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Crocus CNV
Step-by-step configuration
5.3.2 The different clocking modes
This section explains the different clocking modes. The following table gives an overview:
Clocking mode
internal
Description
The Crocus CNV generates the transmit clock signal and sends it to the
application via the TxClk circuit (circuit 114).
Internal clocking can be selected in combination with preferred or alternative
clocking. See below.
slave receive
The transmit clock signal is derived from the received line data. This
reconstructed clock signal is sent to the application via the TxClk circuit (circuit
114).
Slave receive clocking can be selected in combination with preferred or
alternative clocking. See below.
external
The application generates the transmit clock signal and sends it to the Crocus
CNV via the ExtTxClk circuit (circuit 113).
Internal and slave receive clocking can be selected in combination with preferred or alternative clocking:
Clocking mode
Description
preferred
The application loops back the output of the TxClk circuit (circuit 114) to the
ExtTxClk circuit (circuit 113). This guarantees an optimal phase relationship
between the transmitted data and the transmitted clock. This because the
transmission delays of the TxD circuit (circuit 103) and the ExtTxClk circuit are
exactly the same, since the outputs of both circuits originate in the application
and are fed into the Crocus CNV.
alternative
This does not require the TxClk (circuit 114) to ExtTxClk (circuit 113) loop-back.
In this case the clock is looped back within the Crocus CNV itself.
It may be necessary to use preferred clocking when delays are introduced in the communication between
the DTE and the Crocus CNV. Delays may occur in case of long interconnection cables.
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