Download PCI384

Chapter
7
H.100 Bus and Digital Switch
Overview
This chapter discusses the Zarlink MT90866 switch found on the on the mezzanine I/O board
on the PCI384.
Key topics in this chapter include:
•
“H.100 Bus and Digital Switch Features,” on page 65
•
“General Description,” on page 66
•
“MPC8260 Related H.100 Settings,” on page 68
•
“Digital Switch Local TDM Streams Connection,” on page 70
H.100 Bus and Digital Switch Features
The PCI384 uses the Zarlink MT90866 switch to connect the various Time Domain Multiplexed
interface streams together. The switch resides on the mezzanine I/O board. It has local side
connections to the MPC8260s TDM I/O and the QuadFALCs TDM bus. Its Backplane
connection is to the 32-bit H.100 CTbus. The switch features:
•
3.3 V operation with 5 V tolerant inputs and I/Os
•
5 V tolerant PCI drivers on CT-Bus I/Os
•
2,432 x 2,432 non-blocking switching among local streams
•
4,096 x 2,432 blocking switching between backplane and local streams
•
2,048 x 2,048 non-blocking switching among backplane streams
•
Rate conversion between backplane and local streams
•
Rate conversion among local streams
•
Backplane interface accepts data rate of 8.192 Mb/s
65