Download TSC695F 32-bit Sparc Processor

Table of Contents
3.8.1
TAP Interface....................................................................................3-41
3.8.2
Board Level Architecture ..................................................................3-41
3.8.3
TAP Architecture ..............................................................................3-42
3.9
TAP Controller ........................................................................................3-42
3.9.1
TAP Controller FSM .........................................................................3-42
3.10 The Instruction Register ..........................................................................3-43
3.10.1 List of Instructions.............................................................................3-43
3.10.2 Mandatory Instructions .....................................................................3-43
3.10.3 Defined Optional Instructions ...........................................................3-44
3.10.4 Owner Instructions............................................................................3-44
3.11 Test Data Registers ................................................................................3-45
3.11.1 Bypass Register ...............................................................................3-45
3.11.2 Device ID Register............................................................................3-45
3.11.3 Boundary Scan Register...................................................................3-45
3.11.4 Checkers Scan Register...................................................................3-45
3.11.5 IU Scan Register ..............................................................................3-45
3.11.6 FPU Scan Register...........................................................................3-46
3.11.7 System Scan Register ......................................................................3-46
3.11.8 OCD Scan Register ..........................................................................3-47
3.11.9 OCD Control and Status Register ....................................................3-47
3.12 On-chip Debugger Resources ................................................................3-48
3.12.1 Hardware Breakpoints ......................................................................3-48
3.12.2 Processor Reset ...............................................................................3-49
3.12.3 Cycle Counter...................................................................................3-49
3.12.4 Freeze/Run.......................................................................................3-50
3.12.5 Step-by-step .....................................................................................3-50
Section 4
Register Descriptions.......................................................................... 4-51
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
4.10
IU Registers ............................................................................................4-51
Processor State Register ........................................................................4-51
Window Invalid Mask ..............................................................................4-53
Trap Base Register .................................................................................4-54
Y Register ...............................................................................................4-54
Window Registers ...................................................................................4-55
FPU Registers.........................................................................................4-57
FPU Queue Registers.............................................................................4-59
FPU f Registers.......................................................................................4-60
System Registers....................................................................................4-60
4.10.1 System Management Registers .......................................................4-60
4.11 Configuration Registers ..........................................................................4-69
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4148H–AERO–12/03
TSC695F User Manual