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DesignWare IP Family
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C o M BA
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lian
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DW_apb_timers
APB Programmable Timers
DW_apb_timers
APB Programmable Timers
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Up to eight programmable timers
Configurable timer width: 8 to 32 bits
Support for two operation modes:
free-running and user-defined count
Support for independent clocking of
timers
Configurable polarity for each
individual interrupt
APB
Interface
{
pclk
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Configurable option for a single or
combined interrupt output flag
Configurable option to have read/write
coherency registers for each timer
Configurable option to include timer
toggle output, which toggles each time
counter reloads
DW_apb_timers
presetn
psel
paddr[1]
pwdata[1]
pwrite
penable
prdata[1]
timer_en[1]
timer_intr[1]2
timer_intr_n[1]2
timer_intr_flag2
timer_intr_flag_n2
timer_N_toggle2
timer_N_clk
timer_N_resetn
scan_mode
The DesignWare DW_apb_timers Databook is available at:
http://www.synopsys.com/products/designware/docs
January 17, 2005
Synopsys, Inc.
281
DWL Sythesizable IP
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