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8 Models with Multiple Sample Rates This means an interrupt can occur while another interrupt is currently in progress. When this happens, the current interrupt is preempted, the floating-point unit (FPU) context is saved, and the higher priority interrupt executes its higher priority (i.e., faster sample rate) code. Once complete, control is returned to the preempted ISR. The following diagrams illustrate how mixed-rate systems are handled by Real-Time Workshop in these two environments. 8-6
