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Download Xilinx UG331 Spartan-3 Generation FPGA User Guide
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R Component and Pin Names Table 9-5: Carry and Arithmetic Logic Names Name Loc in Slice MUXCY Top CYINIT FPGA Editor Names Inputs Outputs CYMUXG CYMUXF or CY0G COUT (and YB) Bottom CYINIT CIN or BX CYINIT MULT_AND Bottom FAND F1 AND F2 CY0F MULT_AND Top GAND G1 AND G2 CY0G COUT and YB are always the same signal in the SLICEL components (SLICEM allows driving YB from the SRL16 output). In the same way the CYMUXF output always drives the XB output in the SLICEL. Table 9-6 summarizes the carry logic functions. For a detailed picture of the CLB slice, see Chapter 4, “Using Configurable Logic Blocks (CLBs).” Table 9-6: Carry Logic Functions Function CYINIT Description Initializes carry chain for a slice. Fixed selection of: • CIN carry input from the slice below • BX input CY0F Carry generation for bottom half of slice. Fixed selection of: • • • • CY0G Carry generation for top half of slice. Fixed selection of: • • • • CYMUXF F1 or F2 inputs to the LUT (both equal 1 when a carry is to be generated) FAND gate for multiplication BX input for carry initialization Fixed "1" or "0" input for use as a simple Boolean function G1 or G2 inputs to the LUT (both equal 1 when a carry is to be generated) GAND gate for multiplication BY input for carry initialization Fixed "1" or "0" input for use as a simple Boolean function Carry generation or propagation mux for bottom half of slice. Dynamic selection via CYSELF of: • CYINIT carry propagation (CYSELF = 1) • CY0F carry generation (CYSELF = 0) CYMUXG Carry generation or propagation mux for top half of slice. Dynamic selection via CYSELF of: • CYMUXF carry propagation (CYSELG = 1) • CY0G carry generation (CYSELG = 0) CYSELF Carry generation or propagation select for bottom half of slice. Fixed selection of: • F-LUT output (typically XOR result) • Fixed "1" to always propagate CYSELG Carry generation or propagation select for top half of slice. Fixed selection of: • G-LUT output (typically XOR result) • Fixed "1" to always propagate Spartan-3 Generation FPGA User Guide UG331 (v1.5) January 21, 2009 www.xilinx.com 283
