Download VR4181 specs - Delorie Software

Transcript
CHAPTER 11 BUS CONTROL
(3) Flash memory read cycle
Figure 11-5. Flash Memory Read Cycle (WROMA(3:0) = 0111)
TClock
(Internal)
ADD(21:0)
ROMCS(3:0)#
MEMRD#
WROMA(3:0)
DATA(15:0)
(Read)
Remark
A circle in the figure indicates the sampling timing.
(4) Flash memory write cycle
Figure 11-6. Flash Memory Write Cycle (WROMA(3:0) = 0111)
TClock
(Internal)
ADD(21:0)
ROMCS(3:0)#
MEMWR#
WROMA(3:0)
DATA(15:0)
(Write)
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User’s Manual U14272EJ1V0UM00