Download Motorola MVME712AM Installation guide

Transcript
Memory Maps
Local Bus Memory Map
The local bus memory map is split into different address spaces by the transfer
type (TT) signals. The local resources respond to the normal access and
interrupt acknowledge codes.
Normal Address Range
The memory map of devices that respond to the normal address range is
shown in the following tables. The normal address range is defined by the
Transfer Type (TT) signals on the local bus. On the MVME162, Transfer Types
0, 1, and 2 define the normal address range. Table 1-3 is the entire map from
$00000000 to $FFFFFFFF. Many areas of the map are user-programmable, and
suggested uses are shown in the table. The cache inhibit function is
programmable in the MC68xx040 MMU. The onboard I/O space must be
marked cache inhibit and serialized in its page table. Table 1-4 further defines
the map for the local I/O devices.
Table 1-3. Local Bus Memory Map
Address Range
Devices Accessed
Port Width
Software
Cache
Inhibit
Size
Note(s)
Programmable
DRAM on board
D32
1MB-4MB
N
2
Programmable
SRAM
D32
128KB2MB
N
2
Programmable
VMEbus A32/A24
D32/D16
--
?
4
Programmable
IP a Memory
D32-D8
64KB-8MB
?
2, 4
Programmable
IP b Memory
D32-D8
64KB-8MB
?
2, 4
Programmable
IP c Memory
D32-D8
64KB-8MB
?
2, 4
Programmable
IP d Memory
D32-D8
64KB-8MB
?
2, 4
$FF800000 - $FF9FFFFF
Flash/PROM
D32
2MB
N
1, 5
$FFA00000 - $FFBFFFFF
PROM/Flash
D32
2MB
N
6
$FFC00000 - $FFCFFFFF
not decoded
--
1MB
N
7
$FFD00000 - $FFDFFFFF
not decoded
--
1MB
N
7
$FFE00000 - $FFE7FFFF
SRAM default
D32
512KB
N
--
$FFE80000 - $FFEFFFFF
not decoded
--
512KB
N
7
$FFF00000 - $FFFEFFFF
Local I/O
D32-D8
878KB
Y
3
$FFFF0000 - $FFFFFFFF
VMEbus A16
D32/D16
64KB
?
2, 4
MVME162IG/D2
1-21
1