ISP Daisy Chain Reference Manual Download

Transcript
Daisy Chain Downloading
Using ATE Vectors
You can use automatic test equipment (ATE) to program and verify ISP devices,
instead of using stand-alone device programmers. Since you can customize your ISP
device configurations specifically for board-level testing, you can enhance the
testability of your product. Any ATE programming solution requires a JEDEC file, and
a method to translate the JEDEC file into signals on the ISP interface driven by the
ATE. The following two methods are available for performing this translation:
■
■
Create test vectors to program the devices using a translation tool from Lattice
Semiconductor
Write an ATE program language
This section discusses how to use test vectors. For complete information on how to
configure the ATE with Lattice Semiconductor software and devices, see “ATE
Programming of Devices” in the Lattice Semiconductor ISP Manual. Table 3-3 shows
the current LSC-supported testers.
✍ NOTE
You must have an ISP bit stream file to create ATE vectors.
Table 3-3. LSC-Supported Testers
Company
Model
Hewlett Packard
All testers including:
Models 3060, 3065, 3070, 3073
GenRad
GR228X/e Series
Teradyne
Z1800 Series & Z8000 Series–Vector
Processor Option must be installed
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